US 11,809,747 B2
Storage system and method for optimizing write-amplification factor, endurance, and latency during a defragmentation operation
Einav Zilberstein, Had Hasharon (IL); Hadas Oshinsky, Kfar Saba (IL); Oren Ben Hayun, Petah Tikva (IL); Rotem Sela, Haifa (IL); and Alex Lemberg, Kfar Saba (IL)
Assigned to Western Digital Technologies, Inc., San Jose, CA (US)
Filed by Western Digital Technologies, Inc., San Jose, CA (US)
Filed on Dec. 21, 2021, as Appl. No. 17/558,089.
Prior Publication US 2023/0195376 A1, Jun. 22, 2023
Int. Cl. G06F 3/06 (2006.01)
CPC G06F 3/0659 (2013.01) [G06F 3/064 (2013.01); G06F 3/0619 (2013.01); G06F 3/0673 (2013.01)] 14 Claims
OG exemplary drawing
 
1. A storage system comprising:
a memory; and
a controller coupled to the memory and configured to:
dynamically determine a size of a defragmentation unit based on an endurance of the memory;
dynamically determine a memory sense threshold based on the endurance of the memory;
analyze a logical block address range of data stored in the memory, wherein the logical block address range is analyzed in a resolution of the defragmentation unit; and
for each defragmentation unit:
determine a fragmentation level of the defragmentation unit by measuring a number of memory senses needed to read the defragmentation unit using the dynamically determined memory sense threshold;
determine if the fragmentation level is above a fragmentation threshold; and
in response to determining that the fragmentation level is above the defragmentation threshold, perform a defragmentation operation on the defragmentation unit.