US 11,809,739 B2
Memory system
Sachiyo Miyamoto, Yokohama Kanagawa (JP); Terufumi Takasaki, Yokohama Kanagawa (JP); Kenji Sakaue, Yokohama Kanagawa (JP); and Taro Iwashiro, Yokohama Kanagawa (JP)
Assigned to Kioxia Corporation, Tokyo (JP)
Filed by KIOXIA CORPORATION, Tokyo (JP)
Filed on Jan. 31, 2022, as Appl. No. 17/589,583.
Claims priority of application No. 2021-095120 (JP), filed on Jun. 7, 2021.
Prior Publication US 2022/0391130 A1, Dec. 8, 2022
Int. Cl. G06F 3/06 (2006.01)
CPC G06F 3/0655 (2013.01) [G06F 3/0604 (2013.01); G06F 3/0652 (2013.01); G06F 3/0679 (2013.01)] 20 Claims
OG exemplary drawing
 
12. A memory system comprising:
a nonvolatile memory storing a busy table; and
a memory controller configured to control the nonvolatile memory, and including a memory in which the busy table is loaded and a timer, the busy table storing a busy time representing a length of time in which the nonvolatile memory is in a state where the nonvolatile memory cannot receive a command from the memory controller during an operation,
wherein the memory controller
controls a chip enable signal for the nonvolatile memory based on the busy table,
measures an elapsed time from a start of the operation using the timer, and
updates the busy table in accordance with a ready/busy state of the nonvolatile memory when the elapsed time reaches the busy time stored in the busy table.