US 11,809,344 B2
Peripheral component interconnect express interface device and operating method thereof
Yong Tae Jeon, Icheon-si (KR)
Assigned to SK hynix Inc., Icheon-si (KR)
Filed by SK hynix Inc., Icheon-si (KR)
Filed on Nov. 15, 2021, as Appl. No. 17/527,032.
Claims priority of application No. 10-2021-0070762 (KR), filed on Jun. 1, 2021.
Prior Publication US 2022/0382692 A1, Dec. 1, 2022
Int. Cl. G06F 13/16 (2006.01); G06F 13/28 (2006.01); G06F 13/42 (2006.01); G06F 11/07 (2006.01)
CPC G06F 13/1684 (2013.01) [G06F 11/0772 (2013.01); G06F 13/1689 (2013.01); G06F 13/28 (2013.01); G06F 13/4221 (2013.01); G06F 2213/0026 (2013.01)] 28 Claims
OG exemplary drawing
 
1. A Peripheral Component Interconnect Express (PCIe) interface device, comprising:
a PCIe protocol stack performing communication between a host and a Direct Memory Access (DMA) device; and
a PCIe controller switching an operating clock from a PCIe clock, generated based on a reference clock, to an internal clock, processing data of the PCIe protocol stack on the basis of the internal clock, and recovering a link with respect to the host, when a reset signal received from the host is asserted or the reference clock is off.