CPC G06F 13/1684 (2013.01) [G06F 11/0772 (2013.01); G06F 13/1689 (2013.01); G06F 13/28 (2013.01); G06F 13/4221 (2013.01); G06F 2213/0026 (2013.01)] | 28 Claims |
1. A Peripheral Component Interconnect Express (PCIe) interface device, comprising:
a PCIe protocol stack performing communication between a host and a Direct Memory Access (DMA) device; and
a PCIe controller switching an operating clock from a PCIe clock, generated based on a reference clock, to an internal clock, processing data of the PCIe protocol stack on the basis of the internal clock, and recovering a link with respect to the host, when a reset signal received from the host is asserted or the reference clock is off.
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