US 11,809,331 B1
Storage system and method for avoiding header to improve parity
Arunkumar Mani, Karnataka (IN); and Lakshmi Sowjanya Sunkavelli, Karnataka (IN)
Assigned to Western Digital Technologies, Inc., San Jose, CA (US)
Filed by Western Digital Technologies, Inc., San Jose, CA (US)
Filed on May 25, 2022, as Appl. No. 17/824,066.
Int. Cl. G06F 12/1027 (2016.01)
CPC G06F 12/1027 (2013.01) 16 Claims
OG exemplary drawing
 
1. A storage system comprising:
a volatile memory;
a non-volatile memory; and
a controller coupled with the volatile memory and the non-volatile memory and configured to:
store data in a first data word in a primary block in the non-volatile memory;
store a copy of the data in a second data word in a secondary block in the non-volatile memory;
wherein:
the first and second data words are a same size but comprise a different number of parity bits;
the second data word comprises a header storing a logical address of the data; and
instead of comprising the header, the first data word comprises more parity bits than the second data word;
store, in the volatile memory, an association between the logical address of the data and a physical address of the primary block;
verify that the first data word was written correctly in the primary block; and
copy the association from the volatile memory to the non-volatile memory after verifying that the first data word was written correctly in the primary block.