US 11,808,807 B2
Semiconductor integrated circuit device and inspection method for semiconductor integrated circuit device
Akeo Satoh, Hitachinaka (JP); Kazunori Nemoto, Hitachinaka (JP); and Akira Kotabe, Hitachinaka (JP)
Assigned to Hitachi Astemo, Ltd., Hitachinaka (JP)
Appl. No. 17/594,431
Filed by Hitachi Astemo, Ltd., Hitachinaka (JP)
PCT Filed Apr. 3, 2020, PCT No. PCT/JP2020/015285
§ 371(c)(1), (2) Date Oct. 15, 2021,
PCT Pub. No. WO2020/217925, PCT Pub. Date Oct. 29, 2020.
Claims priority of application No. 2019-081653 (JP), filed on Apr. 23, 2019.
Prior Publication US 2022/0187363 A1, Jun. 16, 2022
Int. Cl. G01R 31/28 (2006.01)
CPC G01R 31/2879 (2013.01) 13 Claims
OG exemplary drawing
 
1. A semiconductor integrated circuit device comprising:
an analog circuit;
a diagnostic circuit that detects an abnormality on an input side of the analog circuit;
a digital signal processing unit connected to an analog circuit output side;
a voltage generation circuit that is connected to the input side of the analog circuit and generates a plurality of voltages; and
a switch circuit that is provided between the analog circuit and the voltage generation circuit and is switched on when a burn-in switching signal is input, wherein
the voltage generation circuit outputs a plurality of voltages that do not cause the diagnostic circuit to function.