US 7,616,499 B2
Retention margin program verification
Jun Wan, Sunnyvale, Calif. (US); Jeffrey W. Lutze, San Jose, Calif. (US); Jian Chen, San Jose, Calif. (US); Yan Li, Milpitas, Calif. (US); and Alex Mak, Los Altos Hills, Calif. (US)
Assigned to SanDisk Corporation, Milpitas, Calif. (US)
Filed on Dec. 28, 2006, as Appl. No. 11/617,541.
Prior Publication US 2008/0158989 A1, Jul. 03, 2008
This patent is subject to a terminal disclaimer.
Int. Cl. G11C 11/34 (2006.01); G11C 16/04 (2006.01); G11C 16/06 (2006.01)
U.S. Cl. 365—185.22  [365/185.03; 365/185.24] 17 Claims
OG exemplary drawing
 
1. A method of verifying data in a memory device, comprising:
defining a retention margin between two adjacent data threshold distributions:
programming the memory device with data:
determining whether bits are present in a predefined portion of the data retention margin, wherein the predefined portion of the retention margin is defined by a first voltage threshold and a lower voltage checkport; and
generating an error if the number of bits in the predefined portion of retention margin exceeds a threshold.