| US 7,615,801 B2 | ||
| High voltage silicon carbide devices having bi-directional blocking capabilities | ||
| Sei-Hyung Ryu, Cary, N.C. (US); Jason R. Jenny, Wake Forest, N.C. (US); Mrinal K. Das, Durham, N.C. (US); Anant K. Agarwal, Chapel Hill, N.C. (US); John W. Palmour, Cary, N.C. (US); and Hudson McDonald Hobgood, Pittsboro, N.C. (US) | ||
| Assigned to Cree, Inc., Durham, N.C. (US) | ||
| Filed on Jun. 23, 2005, as Appl. No. 11/159,972. | ||
| Application 11/159972 is a continuation in part of application No. 11/131880, filed on May 18, 2005. | ||
| Prior Publication US 2006/0261348 A1, Nov. 23, 2006 | ||
| This patent is subject to a terminal disclaimer. | ||
| Int. Cl. H01L 29/747 (2006.01) | ||
| U.S. Cl. 257—123 [257/128; 257/E27.052; 257/E29.115; 257/E29.215] | 24 Claims |
| 1. A high voltage silicon carbide (SiC) device, comprising:
a first SiC layer having a first conductivity type on a first surface of a voltage blocking SiC substrate having a second
conductivity type;
a first region of SiC on the first SiC layer and having the second conductivity type;
a second region of SiC in the first SiC layer, having the first conductivity type and being adjacent to and spaced apart from
the first region of SiC;
a second SIC layer having the first conductivity type on a second surface of the voltage blocking SiC substrate;
a third region of SiC on the second SiC layer and having the second conductivity type;
a fourth region of SiC in the second SiC layer, having the first conductivity type and being adjacent to and spaced apart
from the third region of SiC; and
first and second contacts on the first and third regions of SiC, respectively,
wherein sidewalls of the first region are not covered by the first SiC layer; and
wherein sidewalls of the third region are not covered by the second SiC layer.
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