| US 7,615,775 B2 | ||
| Semiconductor apparatus and process for fabricating same | ||
| Masaru Wada, Kanagawa (Japan); Shinichiro Kondo, Tokyo (Japan); and Ryouichi Yasuda, Tokyo (Japan) | ||
| Assigned to Sony Corporation, Tokyo (Japan) | ||
| Appl. No. 10/493,556 PCT Filed Jul. 02, 2003, PCT No. PCT/JP03/08403 § 371(c)(1), (2), (4) Date May 20, 2004, PCT Pub. No. WO2004/006337, PCT Pub. Date Jan. 15, 2004. |
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| Claims priority of application No. 2002-193153 (JP), filed on Jul. 02, 2002; and application No. 2003-184860 (JP), filed on Jun. 27, 2003. | ||
| Prior Publication US 2005/0056828 A1, Mar. 17, 2005 | ||
| Int. Cl. H01L 35/24 (2006.01); H01L 51/00 (2006.01) | ||
| U.S. Cl. 257—40 [257/359; 257/581; 257/E51.005; 257/E51.011; 257/E51.015] | 26 Claims |
| 1. A semiconductor apparatus comprising:
a substrate;
a primary layer formed on the substrate;
at least one layer of bonded product formed on the primary layer, the layer of bonded product including a layer of fine particles
comprising any one of an inorganic conductor and an inorganic semiconductor; and a plurality of organic semiconductor molecules
bonded to the fine particles,
wherein the primary layer comprises a silane compound bonded to the fine particles at a first terminal and the substrate at
a second terminal such that the fine particles are simultaneously bonded to the semiconductor molecules and the silane compound.
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