| US 7,615,478 B2 | ||
| Fabrication method for electronic system modules | ||
| Peter C. Salmon, Mountain View, Calif. (US) | ||
| Assigned to Hynix Semiconductor Inc., Seoul (Korea, Republic of) | ||
| Filed on Jun. 27, 2007, as Appl. No. 11/769,321. | ||
| Application 11/769321 is a continuation of application No. 10/702235, filed on Nov. 05, 2003, granted, now 7,297,572. | ||
| Application 10/702235 is a continuation in part of application No. 10/237640, filed on Sep. 06, 2002, granted, now 6,927,471. | ||
| Claims priority of provisional application 60/318271, filed on Sep. 07, 2001. | ||
| Prior Publication US 2007/0245554 A1, Oct. 25, 2007 | ||
| Int. Cl. H01L 21/44 (2006.01) | ||
| U.S. Cl. 438—612 | 13 Claims |
| 1. A method for fabricating an electronic circuit comprising the steps of:
providing a rigid carrier;
applying a base dielectric layer on said rigid carrier;
fabricating one or more interconnection circuits having exposed input/output pads on said base layer;
fabricating wells at said input/output pads of said interconnection circuits; and
filing said wells with conductive bonding material; and
attaching electronic components formed on a different carrier to said interconnection circuits to form an electronic assembly;
wherein each of said components has a conductive bump at each of its input/output pads, and each of said conductive bumps
is inserted into said conductive bonding material of one of said wells.
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