| US 7,615,468 B2 | ||
| Methods for making substrates and substrates formed therefrom | ||
| Alice Boussagol, Brignoud (France); Bruce Faure, Grenoble (France); Bruno Ghyselen, Seyssinet (France); Fabrice Letertre, Grenoble (France); and Olivier Rayssac, Grenoble (France); Pierre Rayssac, legal representative, and Gisèle Rayssac, legal representative | ||
| Assigned to S.O.I.Tec Silicon on Insulator Technologies, Bernin (France) | ||
| Filed on Aug. 17, 2007, as Appl. No. 11/840,696. | ||
| Application 11/840696 is a continuation in part of application No. 11/505668, filed on Aug. 16, 2006. | ||
| Application 11/505668 is a continuation in part of application No. 10/883437, filed on Jul. 01, 2004, granted, now 7,265,029. | ||
| Application 10/883437 is a continuation of application No. 10/458471, filed on Jun. 09, 2003, abandoned. | ||
| Application 10/458471 is a continuation in part of application No. 10/446605, filed on May 27, 2003, granted, now 6,794,276. | ||
| Application 10/446605 is a continuation of application No. PCT/FR01/03714, filed on Nov. 26, 2001. | ||
| Claims priority of application No. 00 15279 (FR), filed on Nov. 27, 2000; application No. 02 07132 (FR), filed on Jun. 11, 2002; application No. 03 00780 (FR), filed on Jan. 24, 2003; and application No. 05 13045 (FR), filed on Dec. 21, 2005. | ||
| Prior Publication US 2007/0287273 A1, Dec. 13, 2007 | ||
| This patent is subject to a terminal disclaimer. | ||
| Int. Cl. H01L 21/46 (2006.01); H01L 21/30 (2006.01); H01L 21/762 (2006.01) | ||
| U.S. Cl. 438—459 [438/455; 257/E21.567; 257/E21.568; 257/E21.569; 257/E21.57] | 25 Claims |
| 1. A method for fabricating a semiconductor substrate, comprising:
providing an intermediate support;
providing a nucleation layer, wherein the nucleation layer and the intermediate support have substantially the same chemical
composition;
providing at least one bonding layer between the intermediate support and the nucleation layer to improve the bonding energy
therebetween, and to form an intermediate assembly;
depositing at least one layer of a semiconductor material upon the nucleation layer;
bonding a target substrate to the deposited semiconductor material to form a support assembly comprising the target substrate,
the deposited semiconductor material, and the intermediate assembly; and
processing the support assembly to remove the intermediate assembly to provide a semiconductor substrate comprising the at
least one layer of semiconductor material on the target substrate.
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