| US 7,615,412 B2 | ||
| System in package (SIP) integrated circuit and packaging method thereof | ||
| Hsin-Shih Wang, Fremont, Calif. (US) | ||
| Assigned to Faraday Technology Corp., Hsin-Chu (Taiwan) | ||
| Filed on Sep. 18, 2006, as Appl. No. 11/532,790. | ||
| Prior Publication US 2008/0067674 A1, Mar. 20, 2008 | ||
| Int. Cl. H01L 21/44 (2006.01); H01L 21/48 (2006.01); H01L 21/50 (2006.01) | ||
| U.S. Cl. 438—110 [438/106; 438/127] | 10 Claims |
| 1. A method of packaging an SIP integrated circuit, comprising:
arranging one or more first block dices produced by a first process and arranging one or more second block dices produced
by a second process, wherein one of the first process and the second process comprises the usage of a metal programmable cell
array, and the other one of the first process and the second process comprises the usage of a field programmable gate array;
electrically connecting the first block dices to the second block dices; and
packaging the first block dices and the second block dices into a system.
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