an input/output processor comprising:

a disk controller to generate a write command and to generate a read command directed to a source unit, the write command including a write command identifier and the read command including a read command identifier that matches the write command identifier, wherein the write command further includes a byte count, and the read command further includes a byte count that matches the byte count of the write command;

a split-transaction bus to transfer read data, the read data transmitted on the bus by the source unit in response to the read command and including the read command identifier; and

a destination unit to receive the write command and to remove the read data from the split transaction bus if the write command identifier and the read command identifier match and if the byte count of the read data matches the byte count of the write command.