| US 7,445,971 B2 | ||
| Thin film transistor and method for manufacturing the same | ||
| Wataru Saito, Tokyo-to (Japan); and Yudai Yamashita, Tokyo-to (Japan) | ||
| Assigned to Dai Nippon Printing Co., Ltd., Tokyo-to (Japan) | ||
| Filed on Jan. 10, 2007, as Appl. No. 11/651,668. | ||
| Application 11/651668 is a division of application No. 10/761847, filed on Jan. 21, 2004, granted, now 7,166,861. | ||
| Claims priority of application No. 2003-015392 (JP), filed on Jan. 23, 2003. | ||
| Prior Publication US 2007/0117282 A1, May 24, 2007 | ||
| Int. Cl. H01L 21/339 (2006.01) | ||
| U.S. Cl. 438—149 [977/887; 257/E21.413; 257/E21.414; 216/52] | 5 Claims |
| 1. A method for manufacturing a thin-film transistor formed by forming a source electrode and a drain electrode on adjacent
convex portions of a concavoconvex surface of a substrate with a concavoconvex surface, and laminating a gate electrode, a
gate insulating film and a semiconductor channel layer in this order on a bottom surface of a concave area between the convex
portions, comprising:
(1) preparing a substrate and a concavoconvex surface forming substrate on which a concavoconvex pattern is formed;
(2) after sandwiching a curing resin composition by the two substrates, curing the composition and demolding the concavoconvex
surface forming substrate to form a substrate with a concavoconvex surface;
(3) after forming a conductive thin film over the entire surface of the concavoconvex surface, further forming a positive
type resist film thereon so that the concavoconvex surface is flattened;
(4) exposing and developing the resist film by using a mask having the same concavoconvex pattern as the concavoconvex surface
forming substrate, to bare the conductive thin film on the top surfaces of the convex portions;
(5) forming an impurity containing amorphous silicon thin film over the entire surface that has been bared;
(6) removing the resist film and the impurity containing amorphous silicon thin film remaining in the concave areas by exposing
and developing from the front side of the substrate;
(7) etching the bared conductive thin film;
(8) forming an amorphous silicon thin film over the entire surface of the substrate after the etching;
(9) carrying out a laser annealing process to form a semiconductor channel layer formed of polysilicon, as well as crystallizing
the impurity containing amorphous silicon thin film on the top surfaces of the convex portion to form a source side diffusion
layer and a drain side diffusion layer formed of low resistance polysilicon;
(10) forming a gate insulating film on the semiconductor channel layer, the source side diffusion layer and the drain side
diffusion layer; and
(11) forming a gate electrode on the gate insulating film of the upper portion of the semiconductor channel layer.
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