| US 7,614,029 B2 | ||
| Methods and systems for converting a synchronous circuit fabric into an asynchronous dataflow circuit fabric | ||
| Rajit Manohar, Ithaca, N.Y. (US) | ||
| Assigned to Achronix Semiconductor Corporation, San Jose, Calif. (US) | ||
| Filed on Jan. 05, 2007, as Appl. No. 11/650,238. | ||
| Prior Publication US 2008/0168407 A1, Jul. 10, 2008 | ||
| Int. Cl. G06F 17/50 (2006.01) | ||
| U.S. Cl. 716—16 [716/3; 716/18] | 29 Claims |
| 1. A method for converting a synchronous circuit design to an asynchronous dataflow design and implementing the synchronous
dataflow design, the method comprising:
identifying a synchronous circuit design including a plurality of signal-conducting wires, a plurality of synchronous logic
blocks, a plurality of connection boxes including synchronous connection switches connecting the plurality of signal-conducting
wires to the synchronous logic blocks and a plurality of switch boxes including switch box switches connecting the plurality
of signal-conducting wires to other wires;
determining functional characteristics of the synchronous circuit design;
converting, from the synchronous design, at least some of the plurality of synchronous logic blocks to corresponding asynchronous
dataflow logic blocks providing corresponding asynchronous dataflow logic functions with protocol signals;
converting, in the synchronous circuit design, the plurality of signal-conducting wires to tracks, each track supporting the
plurality of signal-conducting wires to communicate data and protocol signals between the asynchronous logic blocks;
converting, in the synchronous circuit design, dependent on the functional characteristics of the synchronous circuit design,
the switch box switches to programmable switch points;
converting, in the synchronous circuit design, dependent on the functional characteristics of the synchronous circuit design,
the synchronous connection switches to programmable switches; and
implementing the asynchronous dataflow design in circuits on an FPGA.
|