| US 7,614,026 B2 | ||
| Pattern forming method, computer program thereof, and semiconductor device manufacturing method using the computer program | ||
| Toshiya Kotani, Machida (Japan); and Hirotaka Ichikawa, Yokohama (Japan) | ||
| Assigned to Kabushiki Kaisha Toshiba, Tokyo (Japan) | ||
| Filed on Sep. 15, 2006, as Appl. No. 11/521,440. | ||
| Claims priority of application No. 2005-271098 (JP), filed on Sep. 16, 2005. | ||
| Prior Publication US 2007/0066025 A1, Mar. 22, 2007 | ||
| Int. Cl. G06F 17/50 (2006.01) | ||
| U.S. Cl. 716—11 [716/19; 716/21] | 20 Claims |
| 1. A pattern forming method for forming a pattern of a desired size on a substrate of a semiconductor device, comprising:
preparing a first database by allocating property data to predetermined positions assigned in a chip;
storing, by a processor, data regarding the allocating in the first database in a memory;
preparing a second database by pairing a cell name of a cell extracted from hierarchical processing of design pattern data
and arrangement positional data of the cell;
storing, by the processor, data regarding the pairing in the second database in the memory;
allocating the property data to the cell based on the first database and the second database, and executing mask data processing
based on at least one of the property data, to prepare for a rearrangement of the cell; and
rearranging on the chip the cell subjected to the mask data processing,
wherein the property data contains at least one selected from the group consisting of an aberration of an exposure device,
a property of an illumination, a property of a projection lens, and a pattern coverage in a shot.
|