| US 7,613,900 B2 | ||
| Systems and methods for selecting input/output configuration in an integrated circuit | ||
| Ricardo E. Gonzalez, Redwood City, Calif. (US); and Albert R. Wang, Los Altos, Calif. (US) | ||
| Assigned to Stretch, Inc., Sunnyvale, Calif. (US) | ||
| Filed on Dec. 21, 2004, as Appl. No. 11/21,247. | ||
| Application 11/021247 is a continuation in part of application No. 10/750714, filed on Dec. 31, 2003. | ||
| Claims priority of provisional application 60/459538, filed on Mar. 31, 2003. | ||
| Prior Publication US 2005/0114565 A1, May 26, 2005 | ||
| Int. Cl. G06F 15/00 (2006.01); G06F 3/00 (2006.01) | ||
| U.S. Cl. 712—29 [710/11] | 37 Claims |
| 1. A processor node configured to operate within an array of processor nodes in a multiprocessor system, the processor node
comprising:
a processor configured to execute instructions and including a processor network switch;
a first input/output interface configured to process communications with an external device outside the array of processor
nodes;
a first inter-processor interface configured to process communications with a second processor node within the array of processor
nodes; and
a selection circuit coupled to the first input/output interface and the first inter-processor interface and further coupled
to one of the external device and the second processor node, the selection circuit configured to select between the first
input/output interface and the first inter-processor interface, based on whether the selection circuit is further coupled
to the external device or to the second processor node,
wherein the processor, the first input/output interface, the first inter-processor interface, and the selection circuit are
included within the processor node.
|