| US 7,613,765 B1 | ||
| Bus architecture for quantum processing | ||
| Jeremy P. Hilton, Vancouver (Canada); and Yutian Ling, Burnaby (Canada) | ||
| Assigned to D-Wave Systems, Inc., Burnaby (Canada) | ||
| Filed on Mar. 25, 2005, as Appl. No. 11/89,653. | ||
| Claims priority of provisional application 60/556778, filed on Mar. 26, 2004. | ||
| Int. Cl. G06G 7/00 (2006.01) | ||
| U.S. Cl. 708—801 | 14 Claims |
| 1. A quantum processing apparatus comprising:
a superconducting qubit;
a superconducting bus;
a quantum device coupled to the superconducting bus; and
a controllable coupling mechanism that controllably couples the superconducting bus to the superconducting qubit, the controllable
coupling mechanism capable of being in any one of a plurality of states at any given time, said plurality of states comprising:
a first state in which the superconducting bus and the superconducting qubit are capacitively coupled, thereby permitting
a coupling to be performed on the superconducting qubit and the superconducting bus; and
a second state in which the superconducting bus and the superconducting qubit are capacitively uncoupled.
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