| US 7,613,022 B2 | ||
| Semiconductor memory device and method of forming the same | ||
| Hiroki Murakami, Yokohama (Japan) | ||
| Assigned to Samsung Electronics Co., Ltd, Gyeonggi-Do (Korea, Republic of) | ||
| Filed on Jun. 26, 2007, as Appl. No. 11/819,174. | ||
| Claims priority of application No. 2006-175551 (JP), filed on Jun. 26, 2006. | ||
| Prior Publication US 2007/0295999 A1, Dec. 27, 2007 | ||
| Int. Cl. G11C 5/06 (2006.01) | ||
| U.S. Cl. 365—63 [365/72] | 14 Claims |
| 1. A semiconductor memory device, comprising:
a memory cell array defining a memory cell region, including a plurality of word lines, a plurality of bit lines, and a plurality
of memory cells arranged at intersections of the plurality of word lines and the plurality of bit lines in a matrix form;
and
a line, crossing the memory cell region, to connect first and second peripheral circuits, disposed in a peripheral region,
to each other, wherein a coupling capacitance between the line and each of the plurality of bit lines is equalized; wherein
the line includes a plurality of bent portions at each of the plurality of bit lines.
|