US 7,612,810 B2
Reduction of effect of image processing on image sensor
Asao Kokubo, Kawasaki (Japan); Hiroshi Daiku, Kawasaki (Japan); Jun Funakoshi, Kawasaki (Japan); Yutaka Takeda, Yokohama (Japan); and Norihiro Yoshida, Yokohama (Japan)
Assigned to Fujitsu Microelectronics Limited, Tokyo (Japan)
Filed on Oct. 20, 2004, as Appl. No. 10/968,044.
Claims priority of application No. 2004-191473 (JP), filed on Jun. 29, 2004.
Prior Publication US 2005/0285961 A1, Dec. 29, 2005
Int. Cl. H04N 5/217 (2006.01); H04N 9/64 (2006.01); H04N 5/335 (2006.01)
U.S. Cl. 348—241  [348/245; 348/312] 9 Claims
OG exemplary drawing
 
1. A solid-state imaging device, comprising:
an image sensor configured to output image data generated by image sensing elements together with a timing signal; and
an image processing unit configured to start performing, in response to the timing signal indicating a first timing, predetermined signal processing on the image data supplied from said image sensor a predetermined delay time after the first timing indicated by the timing signal,
wherein the timing signal supplied from the image sensor to the image processing unit is separate from the image data supplied from the image sensor to the image processing unit, and indicates the first timing that is at least the predetermined delay time earlier than a second timing indicative of a start of a valid period of the image data to trigger the predetermined signal processing at the first timing, and
wherein the image data output from the image sensor to be input into the image processing unit includes dummy data preceding the image data of the valid period from the first timing to the second timing.