| US 7,612,702 B2 | ||
| Analog to digital converter having a non-linear ramp voltage | ||
| Seyed Danesh, Edinburgh (United Kingdom) | ||
| Assigned to STMicroelectronics (Research & Development) Limited, Marlow-Buckhinghamshire (United Kingdom) | ||
| Filed on Jul. 20, 2007, as Appl. No. 11/780,738. | ||
| Claims priority of application No. 06270072 (EP), filed on Jul. 21, 2006. | ||
| Prior Publication US 2008/0042888 A1, Feb. 21, 2008 | ||
| Int. Cl. H03M 1/58 (2006.01) | ||
| U.S. Cl. 341—170 [341/155] | 34 Claims |
| 1. An analog to digital converter comprising:
a digital to analog converter for outputting an analog voltage;
a data storage device;
a digital ramp generator comprising
a first counter for outputting an incremental code based upon a clock signal, said first counter varying the incremental code
by an incremental step based upon the clock signal, and
a second counter for receiving the incremental code from said first counter, and for outputting a digital ramp code that varies
based on the incremental code, the digital ramp code being provided to respective inputs of said digital to analog converter
and to said data storage device;
an analog voltage comparator having a first input for receiving the analog voltage from said digital to analog converter,
and a second input for receiving an input voltage, said analog voltage comparator switching logic states when the analog voltage
received at the first input equals the input voltage received at the second input; and
said data storage device for storing the digital ramp code at the switching of the logic state of said analog voltage comparator.
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