| US 7,612,696 B2 | ||
| Method and system for decimating a pulse width modulated (PWM) signal | ||
| Poojan A. Wagh, Sleepy Hollow, Ill. (US) | ||
| Assigned to Motorola, Inc., Schaumburg, Ill. (US) | ||
| Filed on Mar. 28, 2008, as Appl. No. 12/57,658. | ||
| Prior Publication US 2009/0243908 A1, Oct. 01, 2009 | ||
| Int. Cl. H03M 5/08 (2006.01) | ||
| U.S. Cl. 341—53 [341/50] | 19 Claims |
| 1. A method of decimating a Pulse Width Modulated (PWM) signal, the method comprising:
computing at least one timestamp of the PWM signal, the PWM signal being at a first sample rate, the at least one timestamp
being computed at a second sample rate, wherein the first sample rate is higher than the second sample rate;
generating a plurality of pre-filter signals based on each of the at least one timestamp and a plurality of translation factors,
a pre-filter signal being generated at the second sample rate having a frequency based on the second sample rate;
filtering the plurality of pre-filter signals at the second sample rate using a plurality of Infinite Impulse Response (IIR)
filters, each IIR filter corresponding to at least one translation factor of the plurality of translation factors, resulting
in a plurality of intermediate decimated PCM signals; and
combining the plurality of intermediate decimated PCM signals to produce a Pulse Code Modulated (PCM) signal the PCM signal
being at the second sample rate.
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