| US 7,611,934 B2 | ||
| Semiconductor device and method of fabricating the same | ||
| Risho Koh, Tokyo (Japan); Yukishige Saito, Tokyo (Japan); Jong-Wook Lee, Tokyo (Japan); and Hisashi Takemura, Tokyo (Japan) | ||
| Assigned to NEC Corporation, (Japan) | ||
| Filed on Jul. 15, 2005, as Appl. No. 11/182,150. | ||
| Application 11/182150 is a division of application No. 10/163984, filed on Jun. 06, 2002, granted, now 6,975,001. | ||
| Claims priority of application No. 2001-170961 (JP), filed on Jun. 06, 2001. | ||
| Prior Publication US 2005/0250317 A1, Nov. 10, 2005 | ||
| This patent is subject to a terminal disclaimer. | ||
| Int. Cl. H01L 27/01 (2006.01); H01L 27/12 (2006.01); H01L 31/0392 (2006.01); H01L 21/336 (2006.01); H01L 21/8234 (2006.01) | ||
| U.S. Cl. 438—197 [257/350; 257/347; 257/351] | 28 Claims |
| 1. A semiconductor device, comprising:
(a) a semiconductor layer formed on an electrically insulating layer;
(b) a gate insulating film formed on said semiconductor layer;
(c) a gate electrode formed on said gate insulating film; and
(d) a field insulating film formed on said semiconductor layer for defining a region in which a semiconductor device is to
be fabricated,
said semiconductor layer including:
(a1) source and drain regions formed in said semiconductor layer around said gate electrode, said source and drain regions
containing first electrically conductive type impurity;
(a2) a body contact region formed in said semiconductor layer, said body contact region containing second electrically conductive
type impurity; and
(a3) a carrier path region formed in said semiconductor layer such that said carrier path region does not make contact with
said source and drain regions, but makes contact with said body contact region, said carrier path region containing second
electrically conductive type impurity,
wherein said semiconductor layer has a first region in which said source and drain regions are formed, a second region in
which said carrier path region is formed, and a third region in which said body contact region is formed, and
wherein said gate electrode is comprised of a first portion which is in the level with said field insulating film in a predetermined
allowable error range, and a second portion formed on said first portion such that said second portion extends towards and
above said second region.
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