| US 7,609,099 B2 | ||
| Power-on detecting circuit | ||
| Ryu Ogiwara, Yokohama (Japan); and Daisaburo Takashima, Yokohama (Japan) | ||
| Assigned to Kabushiki Kaisha Toshiba, Tokyo (Japan) | ||
| Filed on Nov. 09, 2006, as Appl. No. 11/558,156. | ||
| Claims priority of application No. 2005-334370 (JP), filed on Nov. 18, 2005. | ||
| Prior Publication US 2007/0115007 A1, May 24, 2007 | ||
| Int. Cl. H03L 7/00 (2006.01) | ||
| U.S. Cl. 327—143 [327/142] | 12 Claims |
| 1. A circuit for detecting a power-on voltage of a power supply, comprising:
a voltage divider connected between a first power supply and a second power supply, the potential of the second power supply
is lower than the potential of the first power supply, the voltage divider including a series circuit which includes:
a diode;
a first dividing resistor connected to the diode; and
a second dividing resistor connected between the first dividing resistor and the second power supply; and
a detecting circuit connected between the first power supply and the second power supply, the detecting circuit including:
a pMOS transistor whose gate electrode is connected to a connection node between the first dividing resistor and the second
dividing resistor;
a source resistor connected between the first power supply and the source electrode of the pMOS transistor; and
a drain resistor connected to the drain electrode of the pMOS transistor and the second power supply,
wherein a resistance value R1 of the first dividing resistor, a resistance value R2 of the second dividing resistor, a resistance value R3 of the source resistor R3 and a resistance value R4 of the drain resistor satisfy:
R2/(R1+R2)=(dVth/dT×R4/(R3+R4))/(dVdio/dT),
where dVth/dT is a temperature dependence of a threshold voltage of the pMOS transistor, and dVdio/dT is a temperature dependence of an on-state voltage of the diode.
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