| US 7,608,907 B2 | ||
| LDMOS gate controlled schottky diode | ||
| Shekar Mallikarjunaswamy, San Jose, Calif. (US) | ||
| Assigned to Micrel, Inc., San Jose, Calif. (US) | ||
| Filed on Jan. 06, 2005, as Appl. No. 11/31,201. | ||
| Prior Publication US 2006/0145185 A1, Jul. 06, 2006 | ||
| Int. Cl. H01L 21/336 (2006.01) | ||
| U.S. Cl. 257—476 [257/280; 257/281; 257/E27.068; 257/E29.338] | 2 Claims |

| 1. A diode comprising:
a Schottky diode; and
a LDMOS device coupled in series with the Schottky diode, wherein the Schottky diode is integrated into an N-well drain of
the LDMOS device and allows for forward current flow and the LDMOS device supports the forward voltage when the diode enters
current saturation, wherein the LDMOS device allows reverse current to flow and the diode blocks the reverse current, the
LDMOS device further comprising:
a LDMOS body-ground parasitic PNP transistor;
an anode-ground parasitic PNP transistor;
an N-type buried layer disposed near a P-type substrate within the LDMOS device, wherein the N-type buried layer reduces the
gain of the LDMOS body-ground parasitic PNP transistor and the anode-ground parasitic PNP transistor;
a p+ guard ring within the LDMOS device to allow for an increased reverse blocking state of the LDMOS device;
N− source diffusion; and
an N-drift region, wherein the N-drift region is of a lower doping concentration that the N+ source diffusion to enhance the
increased reverse blocking state of the diode.
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