| US 7,608,891 B2 | ||
| Thin film transistor, circuit apparatus and liquid crystal display | ||
| Masato Hiramatsu, Tokyo (Japan); Masakiyo Matsumura, Kanagawa (Japan); Mikihiko Nishitani, Nara (Japan); Yoshinobu Kimura, Tokyo (Japan); and Yoshitaka Yamamoto, Nara (Japan) | ||
| Assigned to Kabushiki Kaisha Ekisho Sentan Gijutsu Kaihatsu Center, Kanagawa (Japan) | ||
| Filed on Sep. 01, 2006, as Appl. No. 11/469,748. | ||
| Prior Publication US 2007/0023759 A1, Feb. 01, 2007 | ||
| Int. Cl. H01L 27/01 (2006.01) | ||
| U.S. Cl. 257—347 [257/401; 257/72; 257/369; 257/773; 257/775] | 4 Claims |
| 1. A thin film semiconductor device, comprising:
a substrate;
a polycrystalline silicon film provided on said substrate and having plural long and slender grains having a longitudinal
grain direction; and
a thin film transistor having an active layer in said amorphous silicon film;
wherein a grain boundary between said grains adjacent to each other extends along the longitudinal direction of said grains;
wherein said thin film transistor has a source region and a drain region having width directions and arranged at intervals
from each other along said grain boundary in said active layer, a source electrode connected with said source region through
multiple contact holes, and a drain electrode connected with said drain region through multiple contact holes; and
wherein said contact holes are arranged respectively in said source region and said drain region in the respective width directions
of said source region and said drain region in each said grain such that an electric current density becomes uniform.
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