| US 7,608,503 B2 | ||
| Side wall active pin memory and manufacturing method | ||
| Hsiang Lan Lung, Elmsford, N.Y. (US); Shih-Hung Chen, Elmsford, N.Y. (US); and Yi-Chou Chen, Cupertino, Calif. (US) | ||
| Assigned to Macronix International Co., Ltd., Hsinchu (Taiwan) | ||
| Filed on Nov. 21, 2005, as Appl. No. 11/285,473. | ||
| Claims priority of provisional application 60/630123, filed on Nov. 22, 2004. | ||
| Prior Publication US 2006/0110878 A1, May 25, 2006 | ||
| Int. Cl. H01L 21/8242 (2006.01) | ||
| U.S. Cl. 438—253 [438/103; 438/685; 438/687; 438/178; 438/396; 257/167; 257/245; 257/250; 257/306; 257/532] | 34 Claims |

| 1. A method of forming a memory cell, comprising:
forming a first electrode, an insulating layer over the first electrode, a second electrode over the insulating layer, and
a protective layer over the second electrode, with a side wall on the insulating layer;
forming a side wall spacer on the side wall, the spacer comprising a layer of a programmable resistive material in electrical
communication with the first and second electrodes, the side wall spacer having a length extending from the first electrode
to the second electrode along the side wall, a width generally orthogonal to the length, the spacer, the first electrode and
the second electrode having respective thicknesses which are less than 40 nm, and wherein forming the side wall spacer comprises
depositing a layer of the programmable resistive material over the side wall and on the protective layer;
anisotropically etching the layer of programmable resistive material to remove programmable resistive material in areas other
than the side wall;
forming a fill material on the protective layer and surrounding the programmable resistive material on the side wall;
planarizing the fill material to expose tops of the programmable resistive material on the sidewall and leave a remaining
portion of the protective layer over the second electrode;
forming an etch mask having a lithographic pattern to define a lithographic width;
trimming the etch mask to provide a trimmed mask to define a pattern; and
selectively etching the programmable resistive material according to the pattern, to define the width of the side wall spacer,
the width being less than 40 nm.
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