| US 7,608,498 B2 | ||
| Method of manufacturing semiconductor device | ||
| Takuya Kobayashi, Yokohama-Shi (Japan); Katsuyuki Sekine, Yokohama (Japan); Tomonori Aoyama, Yokohama (Japan); and Hiroshi Tomita, Yokohama (Japan) | ||
| Assigned to Kabushiki Kaisha Toshiba, Tokyo (Japan) | ||
| Filed on Jan. 02, 2008, as Appl. No. 12/3,802. | ||
| Application 12/003802 is a continuation of application No. 11/494736, filed on Jul. 28, 2006, granted, now 7,335,562. | ||
| Claims priority of application No. 2005-308564 (JP), filed on Oct. 24, 2005; and application No. 2006-052166 (JP), filed on Feb. 28, 2006. | ||
| Prior Publication US 2008/0182396 A1, Jul. 31, 2008 | ||
| Int. Cl. H01L 21/336 (2006.01) | ||
| U.S. Cl. 438—197 [438/287; 438/585; 438/183; 257/E21.625] | 8 Claims |
| 1. A method of manufacturing a semiconductor device comprising:
forming a trench in an interlayer dielectric film on a semiconductor substrate, and forming a silicon dioxide film as a part
of a gate dielectric film on the semiconductor substrate, the trench reaching the semiconductor substrate and having a sidewall
made of silicon nitride film;
depositing a gate dielectric film made of a HfSiO film as another part of the gate dielectric film, so that the HfSiO film
is selectively deposited on the silicon dioxide film which is exposed at a bottom surface of the trench rather than on the
silicon nitride film; and
filling the trench with a gate electrode made of metal.
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