| US 7,608,490 B2 | ||
| Semiconductor device and manufacturing method thereof | ||
| Shunpei Yamazaki, Setagaya (Japan); Tetsuya Kakehata, Isehara (Japan); Hideto Ohnuma, Atsugi (Japan); Masaharu Nagai, Atsugi (Japan); Mitsuaki Osame, Atsugi (Japan); Masayuki Sakakura, Isehara (Japan); and Shigeki Komori, Atsugi (Japan) | ||
| Assigned to Semiconductor Energy Laboratory Co., Ltd., Atsugi-shi, Kanagawa-ken (Japan) | ||
| Filed on May 25, 2006, as Appl. No. 11/440,175. | ||
| Claims priority of application No. 2005-162308 (JP), filed on Jun. 02, 2005. | ||
| Prior Publication US 2006/0275710 A1, Dec. 07, 2006 | ||
| Int. Cl. H01L 21/00 (2006.01) | ||
| U.S. Cl. 438—149 [257/59; 257/291; 438/151; 349/42; 349/43; 349/44; 349/45; 349/47] | 14 Claims |

| 1. A manufacturing method of a semiconductor device, comprising:
crystallizing a semiconductor layer with a laser selected from the group consisting of a continuous wave laser and a pulsed
laser with a repetition rate of 10 MHz to 100 GHz;
forming a first insulating layer on the semiconductor layer after crystallizing the semiconductor layer by oxidation treatment
with the use of oxygen radicals produced by plasma with an electron temperature of 3 eV or less and an electron density of
1×1011 cm−3 or more;
forming a first conductive layer over the first insulating layer;
etching the first conductive layer by using a first mask pattern which is intentionally formed to have a portion with a nonuniform
thickness and a second mask pattern which is formed to have a uniform thickness by using a photomask or a reticle including
an auxiliary pattern having a function of reducing the light intensity;
forming a second insulating layer over the first conductive layer after etching the first conductive layer;
forming a second conductive layer over the second insulating layer;
etching the second conductive layer;
forming a third insulating layer over the second conductive layer after etching the second conductive layer; and
etching the first insulating layer, the second insulating layer and the third insulating layer to form a contact hole reaching
the semiconductor layer.
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