| US 7,603,637 B2 | ||
| Secure, stable on chip silicon identification | ||
| Steven L. Haehn, Fort Collins, Colo. (US) | ||
| Assigned to LSI Corporation, Milpitas, Calif. (US) | ||
| Filed on Aug. 24, 2006, as Appl. No. 11/466,885. | ||
| Prior Publication US 2008/0082875 A1, Apr. 03, 2008 | ||
| Int. Cl. G06F 17/50 (2006.01); G06F 19/00 (2006.01) | ||
| U.S. Cl. 716—4 [716/8] | 15 Claims |
| 1. A circuit for providing a bit string, the circuit comprising:
a plurality of commonly wired, substantially identical bit cells in a string, where each bit cell is designed to read as only
one of a logical high and a logical low upon a given input, and each bit cell comprises a bit in the bit string,
an enable line associated with each of the bit cells,
each enable line having a fuse adapted to be activated upon application of a signal by a tester,
each bit cell configured so as to be logically isolated from all others of the plurality of bit cells in the string when the
fuse associated with the bit cell is activated, and
the circuit adapted such that bit cells having fuses that are activated are logically removed from the bit string.
|