US 7,603,527 B2
Resolving false dependencies of speculative load instructions
Sebastien Hily, Hillsboro, Oreg. (US); Zhongying Zhang, Portland, Oreg. (US); and Per Hammarlund, Hillsboro, Oreg. (US)
Assigned to Intel Corporation, Santa Clara, Calif. (US)
Filed on Sep. 29, 2006, as Appl. No. 11/541,364.
Prior Publication US 2008/0082765 A1, Apr. 03, 2008
Int. Cl. G06F 13/14 (2006.01); G06F 12/08 (2006.01); G06F 9/38 (2006.01)
U.S. Cl. 711—158  [711/203; 712/216] 30 Claims
OG exemplary drawing
 
14. A method comprising:
determining, by a logic circuitry, if a first physical address corresponding to a load instruction matches a second physical address corresponding to a store instruction in response to determining that:
a first portion of a first virtual address corresponding to the first physical address matches a first portion of a second virtual address corresponding to the second physical address; and
a second portion of the first virtual address is different than a second portion of the second virtual address.