| US 7,603,523 B2 | ||
| Method and apparatus for filtering snoop requests in a point-to-point interconnect architecture | ||
| Matthias A. Blumrich, Ridgefield, Conn. (US); Dong Chen, Croton On Hudson, N.Y. (US); Alan G. Gara, Mount Kisco, N.Y. (US); Mark E. Giampapa, Irvington, N.Y. (US); Philip Heidelberger, Cortlandt Manor, N.Y. (US); Dirk I. Hoenicke, Ossining, N.Y. (US); Martin Ohmacht, Yorktown Heights, N.Y. (US); Valentina Salapura, Chappaqua, N.Y. (US); and Pavlos M. Vranas, Bedford Hills, N.Y. (US) | ||
| Assigned to International Business Machines Corporation, Armonk, N.Y. (US) | ||
| Filed on Feb. 21, 2008, as Appl. No. 12/35,085. | ||
| Application 12/035085 is a continuation of application No. 11/093131, filed on Mar. 29, 2005, granted, now 7,386,683. | ||
| Prior Publication US 2008/0133845 A1, Jun. 05, 2008 | ||
| This patent is subject to a terminal disclaimer. | ||
| Int. Cl. G06F 12/08 (2006.01); G06F 13/00 (2006.01) | ||
| U.S. Cl. 711—146 [711/100; 711/118; 711/131; 711/154] | 9 Claims |
| 1. A system for supporting cache coherency in a multiprocessor computing environment having multiple processing units, each
processing unit having one or more local cache memories associated therewith and operatively connected via a first communications
means, said system comprising:
a plurality of snoop filter devices in 1:1 correspondence with an associated processing unit, each said snoop filter device
having a plurality of dedicated input ports for receiving snoop requests from dedicated memory writing sources in said multiprocessor
computing environment;
a point-to-point interconnect means comprising communication links for directly connecting said memory writing sources to
the dedicated input ports of all other snoop filter devices associated with all other processing units of said multiprocessor
computing environment;
each of said plurality of snoop filter devices further having a plurality of parallel operating port snoop filters in 1:1
correspondence with said plurality of dedicated input ports, each said plurality of parallel operating port snoop filters
having a corresponding snoop cache adapted for tracking snoop requests from a corresponding one of said dedicated memory writing
sources and recording an address of each snoop request from its corresponding memory writing source; and, and having a corresponding
snoop cache logic means for comparing a received snoop request address against all addresses recorded in said corresponding
snoop cache,
said plurality of port snoop filter devices concurrently filter snoop requests received from respective said dedicated memory
writing sources and forward a subset of those requests to its associated processing unit,
whereby a number of snoop requests forwarded to a processing unit is reduced thereby increasing performance of said computing
environment.
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