| US 7,602,358 B2 | ||
| Display device substrate and liquid crystal display device having the same | ||
| Toshihide Tsubata, Matsusaka (Japan); Morihide Ohsaki, Tsu (Japan); and Masanori Takeuchi, Matsusaka (Japan) | ||
| Assigned to Sharp Kabushiki Kaisha, Osaka (Japan) | ||
| Filed on Nov. 21, 2003, as Appl. No. 10/717,917. | ||
| Claims priority of application No. 2002-381669 (JP), filed on Dec. 27, 2002; and application No. 2003-372584 (JP), filed on Oct. 31, 2003. | ||
| Prior Publication US 2004/0141100 A1, Jul. 22, 2004 | ||
| Int. Cl. G09G 3/36 (2006.01) | ||
| U.S. Cl. 345—87 [349/84; 349/139] | 18 Claims |

| 1. A display device substrate, comprising:
one or more pixel electrodes each of which is provided on each intersection of a signal line and a scanning line that are
provided on an insulating substrate; and
an interlayer insulating film stacked between the signal line and the pixel electrode, wherein
in view of a vertical direction with respect to a surface of the insulating substrate, the signal line is provided on an area
on which the pixel electrode is not provided, and a gap is provided between the signal line and the pixel electrode; and
wherein the signal line is covered by a light shielding film having an insulating property that contacts the signal line;
wherein the interlayer insulating film is provided on the light shielding film; wherein the pixel electrode is provided on
the interlayer insulating film; and wherein in view of a vertical direction with respect to the surface of the insulating
substrate, a surface of the signal line and the gap provided between the signal line and the pixel electrode are covered by
the light shielding film,
wherein in view of a vertical direction with respect to a surface of the insulating substrate, the pixel electrode, the interlayer
insulating film, the light-shielding film, and the signal line are provided in this order;
wherein the gap includes an area in which no voltage is applied to a region between the pixel electrode and the signal line;
and
wherein the gap is set to be within a range of from not less than 2 μm to not more than 20 μm.
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