US 7,602,209 B2
Controlling memory devices that have on-die termination
Kyung Suk Oh, Campbell, Calif. (US); and Ian P. Shaeffer, San Jose, Calif. (US)
Assigned to Rambus Inc., Los Altos, Calif. (US)
Filed on Aug. 27, 2008, as Appl. No. 12/199,726.
Application 12/199726 is a continuation of application No. 11/422022, filed on Jun. 02, 2006, granted, now 7,486,104.
Prior Publication US 2008/0315916 A1, Dec. 25, 2008
Int. Cl. H03K 17/16 (2006.01)
U.S. Cl. 326—30  [326/83] 29 Claims
OG exemplary drawing
 
1. A memory controller comprising:
an output driver to output a first data signal onto a data line; and
termination control circuitry to output termination control signals to a plurality of integrated circuit memory devices, the termination control signals to control coupling and decoupling of termination elements to the data line according to which of the plurality of integrated circuit memory devices is selected to receive the first data signal, wherein the termination control signals specify coupling a termination element having an impedance indicated by a first termination value to the data line within one of the plurality of integrated circuit memory devices selected to receive the first data signal, and wherein the termination control signals further specify coupling a termination element having an impedance indicated by a second termination value to the data line within at least one other of the plurality of integrated circuit memory devices.