| US 7,602,022 B2 | ||
| Surge voltage protection diode with controlled p-n junction density gradients | ||
| Naoki Kumagai, Tokyo (Japan); Hiroshi Kanemaru, Miyazaki (Japan); Yuiichi Harada, Nagano (Japan); Yoshihiro Ikura, Nagano (Japan); and Ryuu Saitou, Nagano (Japan) | ||
| Assigned to Fuji Electric Device Technology Co., Ltd., (Japan) | ||
| Filed on Mar. 14, 2006, as Appl. No. 11/374,420. | ||
| Claims priority of application No. 2005-071307 (JP), filed on Mar. 14, 2005. | ||
| Prior Publication US 2006/0231836 A1, Oct. 19, 2006 | ||
| Int. Cl. H01L 23/62 (2006.01) | ||
| U.S. Cl. 257—355 [257/173; 257/328; 257/356; 257/360; 257/546; 257/E29.326; 257/E29.327; 257/E29.328] | 5 Claims |
| 1. A vertical surge voltage protection diode integrated with a horizontal device in a semiconductor substrate, comprising:
a semiconductor region of a first conductivity type having low resistivity;
a semiconductor region of the first conductivity type having medium resistivity;
a semiconductor region of the first conductivity type having high resistivity;
a semiconductor region of a second conductivity type having low resistivity provided on a surface of the semiconductor region
of the first conductivity type having high resistivity;
a semiconductor region of the second conductivity type having high resistivity covering the semiconductor region of the second
conductivity type having low resistivity and extending to the semiconductor region of the first conductivity type having medium
resistivity; and
a well region of the second conductivity type, within which the horizontal device is formed,
wherein the semiconductor region of the second conductivity type having high resistivity and the semiconductor region of the
first conductivity type having medium resistivity form a p-n junction of a diode; and
wherein the semiconductor region of the second conductivity type having high resistivity is deeper than the well region.
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