US 7,601,996 B2
Semiconductor device and manufacturing method thereof
Hiroyuki Ohta, Kawasaki (Japan); and Kenichi Okabe, Kawasaki (Japan)
Assigned to Fujitsu Microelectronics Limited, Tokyo (Japan)
Filed on May 23, 2006, as Appl. No. 11/438,684.
Claims priority of application No. 2006-007742 (JP), filed on Jan. 16, 2006.
Prior Publication US 2007/0164375 A1, Jul. 19, 2007
Int. Cl. H01L 29/76 (2006.01)
U.S. Cl. 257—213  [257/E51.005; 257/E29.13] 5 Claims
OG exemplary drawing
 
1. A semiconductor device including a field-effect transistor arranged in a semiconductor substrate, the transistor comprising:
a gate electrode;
a source/drain extension region in the semiconductor substrate;
a source/drain impurity diffusion region in the semiconductor substrate deeper than the source/drain extension region;
a carbon layer surrounding the source/drain impurity diffusion region; and
a pocket region located below the source/drain extension region,
wherein the carbon layer is offset from front edges of the source/drain extension region and the pocket region in the direction away from the gate electrode.