| US 7,601,625 B2 | ||
| Method for manufacturing semiconductor device having solder layer | ||
| Chikage Noritake, Ama-gun (Japan); Yoshitsugu Sakamoto, Toyohashi (Japan); Akira Tanahashi, Okazaki (Japan); Hideki Okada, Aichi-gun (Japan); and Tomomasa Yoshida, Aichi-gun (Japan) | ||
| Assigned to DENSO CORPORATION, Kariya (Japan); and Toyota Jidosha Kabushiki Kaisha, Aichi-ken (Japan) | ||
| Filed on Apr. 19, 2005, as Appl. No. 11/108,908. | ||
| Claims priority of application No. 2004-124222 (JP), filed on Apr. 20, 2004. | ||
| Prior Publication US 2005/0233568 A1, Oct. 20, 2005 | ||
| Int. Cl. H01L 21/44 (2006.01) | ||
| U.S. Cl. 438—612 [257/E21.51] | 12 Claims |
| 1. A method for manufacturing a semiconductor device having a solder layer, the method comprising the steps of:
grinding a mounting surface of a semiconductor chip;
etching the mounting surface of the chip; and after the etching, the mounting surface having an average surface roughness
equal to or smaller than 2 nm;
forming an electrode on the mounting surface of the chip, wherein the step of forming the electrode includes directly bonding
the electrode to the mounting surface of the semiconductor chip;
assembling the chip, the solder layer and a base in this order; and
heating the chip, the solder layer and the base to be equal to or higher than a solidus temperature of the solder layer so
that the solder layer is reflowed for soldering the chip on the base, wherein
the solder layer includes tin in an amount equal to or larger than 95% of the solder layer and is formed from Sn—Ag, Sn—Ag—Cu,
Sn—Cu, or Sn—Cu—Ni, and of a Pb free solder, and
the step of forming the electrode includes the step of forming a nickel layer having a thickness equal to or larger than 600
nm on the mounting surface.
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