US 7,601,611 B2
	Method of fabricating a semiconductor hetero-structure
Ian Cayrefourcq, St. Nazaire les Eymes (France); Fabrice Letertre, Grenoble (France); and Bruno Ghyselen, Seyssinet-Pariset (France)
Assigned to S.O.I.Tec Silicon on Insulator Technologies, Bernin (France)
Filed on Jun. 07, 2005, as Appl. No. 11/147,575.
Claims priority of application No. 05 02923 (FR), filed on Mar. 24, 2005.
Prior Publication US 2006/0216907 A1, Sep. 28, 2006
Int. Cl. H01L 21/30 (2006.01)

U.S. Cl. 438—455  [438/458; 257/E21.567]

16 Claims

1. A method of fabricating a semiconductor hetero-structure which comprises transferring, onto a support of a first material, a thin monocrystalline layer of a second material that differs from the first material to form an assembly that has a bonding interface between the layer and the support, with the thin layer having a thickness selected as a function of the difference between coefficients of thermal expansion of the first and second materials and as a function of heat treatment parameters so that the stresses exerted by the heat treatment on the assembly leaves the assembly intact, with the thickness being sufficiently thin to not cause rupture phenomenon or undesirable plastic deformation phenomenon associated with dislocations, atomic slip planes, or cracks; performing a predetermined heat treatment for strengthening the bonding interface; and forming an additional thickness of the second material in the monocrystalline state onto the transferred thin layer to form the structure, wherein the additional thickness formed is less than 10 μm.