| US 7,601,566 B2 | ||
| Semiconductor device and manufacturing method thereof | ||
| Masayuki Sakakura, Kanagawa (Japan); Hideto Ohnuma, Kanagawa (Japan); and Hideaki Kuwabara, Kanagawa (Japan) | ||
| Assigned to Semiconductor Energy Laboratory Co., Ltd., Atsugi-shi, Kanagawa-ken (Japan) | ||
| Filed on Oct. 13, 2006, as Appl. No. 11/549,400. | ||
| Claims priority of application No. 2005-303674 (JP), filed on Oct. 18, 2005. | ||
| Prior Publication US 2007/0087616 A1, Apr. 19, 2007 | ||
| Int. Cl. H01L 21/00 (2006.01) | ||
| U.S. Cl. 438—149 [257/59; 257/E29.282; 257/E29.151; 257/E29.202; 257/E29.273; 257/E21.413] | 10 Claims |
| 1. A method for manufacturing a semiconductor device, comprising:
forming a first conductive film on an insulating surface;
forming a second conductive film on and in contact with the first conductive film;
forming a first mask and a second mask over the second conductive film using a photo mask or a reticle each of which is provided
with a pattern having a light intensity reducing function, the pattern comprising a diffraction grating pattern or a semi-translucent
film wherein the first mask is partially thin;
forming a first wire and a second wire by etching the first conductive film and the second conductive film using the first
mask and the second mask wherein the second wire corresponding to the second conductive film has a part narrower than the
first wire corresponding to the first conductive film;
forming an insulating film covering the first wire and the second wire; and
forming a third wire over the insulating film to intersect with the first wire and the second wire,
wherein the third wire overlaps with the first wire in a part in which the first wire is wider than the second wire, and
wherein the third wire and the first wire are electrically insulated with each other.
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