| US 7,601,555 B2 | ||
| Wafer inspection system and method thereof | ||
| Kwang-soo Kim, Yongin-si (Korea, Republic of); Koung-su Shin, Suwon-si (Korea, Republic of); Seung-min Choi, Suwon-si (Korea, Republic of); and Yu-han Jeong, Suwon-si (Korea, Republic of) | ||
| Assigned to Samsung Electronics Co., Ltd, Suwon-si (Korea, Republic of) | ||
| Filed on May 19, 2005, as Appl. No. 11/132,352. | ||
| Claims priority of application No. 10-2004-0045747 (KR), filed on Jun. 18, 2004. | ||
| Prior Publication US 2005/0282299 A1, Dec. 22, 2005 | ||
| Int. Cl. H01L 21/00 (2006.01) | ||
| U.S. Cl. 438—48 | 18 Claims |
| 1. A wafer inspection system comprising:
an electrical testing part to control a probe to be in contact with a pad of a wafer and to perform a predetermined electrical
test;
a defect detecting part to detect a defect in the wafer through the electrical test;
a defect sorting part to sort the defect detected in the defect detecting part by an in-line method, comprising:
an image pickup part to photograph a defect image containing the defect of the wafer detected by the defect detecting part,
and
a signal processing part to process the defect image from the image pickup part so that the defect is detected, to calculate
a binary image from the defect image, and to calculate an oblique scratch according to the binary image with respect to a
predetermined coordinate axis; and
a defective determining part to determine whether the wafer is defective according to a sorting result of the defect sorting
part.
|