| US 7,601,246 B2 | ||
| Methods of sputtering a protective coating on a semiconductor substrate | ||
| Jisoo Kim, Pleasanton, Calif. (US); Jong Shon, Fremont, Calif. (US); Biming Yen, Fremont, Calif. (US); and Peter Loewenhardt, Pleasanton, Calif. (US) | ||
| Assigned to Lam Research Corporation, Fremont, Calif. (US) | ||
| Filed on Sep. 29, 2004, as Appl. No. 10/952,088. | ||
| Prior Publication US 2009/0020417 A1, Jan. 22, 2009 | ||
| Int. Cl. C23C 14/34 (2006.01) | ||
| U.S. Cl. 204—192.23 [204/192.12; 204/192.15; 204/192.32; 204/298.12; 204/298.07] | 29 Claims |
| 1. A method of depositing a protective coating of a silicon-containing material on a semiconductor substrate in a dual damascene
process, the method comprising:
providing a semiconductor substrate in a capacitively-coupled plasma processing chamber including a first electrode of a silicon-containing
material and a second electrode, the semiconductor substrate comprising a low-k dielectric layer and a multi-layer mask including
a patterned top imaging layer over the low-k dielectric layer, the semiconductor substrate being supported on the second electrode
and the first electrode comprising a showerhead electrode;
supplying a first process gas through the first electrode into a gap between the first and second electrodes of the plasma
processing chamber; and
energizing the first process gas into the plasma state and sputtering the silicon-containing material from the first electrode
and forming a protective coating of the sputtered material on the imaging layer, without substantially etching the semiconductor
substrate.
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