| US 7,599,369 B2 | ||
| Apparatus and methods for hardware payload header suppression, expansion, and verification in a DOCSIS network | ||
| Shane Lansing, Mission Viejo, Calif. (US); and Heratch Avakian, Glendale, Calif. (US) | ||
| Assigned to Broadcom Corporation, Irvine, Calif. (US) | ||
| Filed on Aug. 15, 2002, as Appl. No. 10/218,582. | ||
| Claims priority of provisional application 60/324911, filed on Sep. 27, 2001. | ||
| Prior Publication US 2003/0058889 A1, Mar. 27, 2003 | ||
| Int. Cl. H04L 12/56 (2006.01) | ||
| U.S. Cl. 370—392 [370/419; 370/474] | 12 Claims |
| 1. An apparatus for performing payload header verification and suppression, comprising:
a descriptor/payload fetch circuit configured to isolate a header and a payload from a data packet from among a plurality
of data packets;
a payload header verification circuit configured to:
(i) receive at least a portion of the header from the descriptor/payload fetch circuit,
(ii) compare the at least a portion of the header to an expected value, and
(iii) set a verification pass indication if the at least a portion of the header equals the expected value; and
a payload header suppress circuit coupled to the payload header verification circuit configured to suppress the header of
at least one of the plurality of data packets based on the verification pass indication.
|