US 7,598,818 B2
Temperature compensation for a voltage-controlled oscillator
Gilles Bas, Beauvoisin (France); Vincent Cheynet De Beaupre, Marseilles (France); Zaid Lakhdar, Saint-Cyr/mer (France); and Weneestas Rahajandraibe, Marseilles (France)
Assigned to STMicroelectronics SAS, Rousset (France); and Universite de Provence (Aix-Marseille I), Marseille Cedex (France)
Filed on Sep. 14, 2005, as Appl. No. 11/226,051.
Claims priority of application No. 04 09725 (FR), filed on Sep. 14, 2004.
Prior Publication US 2006/0097805 A1, May 11, 2006
Int. Cl. H03L 1/02 (2006.01); H03L 7/099 (2006.01)
U.S. Cl. 331—57  [331/66; 331/176; 331/185] 28 Claims
OG exemplary drawing
 
15. A radio frequency send/receive device comprising:
a send circuit;
a receive circuit;
an aerial coupled to the send circuit and the receive circuit;
a phase-locked loop including:
an oscillator including:
an oscillating structure with a ring structure, the oscillating structure including at least one first transistor of the PMOS type with its source coupled to a positive power supply node and its gate receiving a cell oscillation frequency control voltage, and a plurality of delay cells looped together, the oscillator generating a radio frequency output signal with a frequency that drifts as a function of the temperature of its environment, each of the delay cells including:
a first resistance coupled between the positive power supply node and a first output;
a second resistance coupled between the positive power supply node and a second output;
a second transistor of the PMOS type with its gate coupled to the second output, its source coupled to the drain of the first transistor and its drain coupled to the first output;
a third transistor of the PMOS type with its gate coupled to the first output, its source coupled to the drain of the first transistor and its drain coupled to the second output;
a fourth transistor of the NMOS type with its gate coupled to a first input such that the fourth transistor is controlled based on a voltage at the first input, the drain of the fourth transistor being coupled to the first output and the source of the fourth transistor being coupled to a ground node; and
a fifth transistor of the NMOS type with its gate coupled to a second input such that the fifth transistor is controlled based on a voltage at the second input, the drain of the fifth transistor being coupled to the second output and the source of the fifth transistor being coupled to the ground node; and
a compensation circuit coupled to the oscillating structure, the compensation circuit supplying a temperature compensation current that grows with the temperature to the first and second resistances of the delay cells in order to compensate for the drift in the frequency of the output signal generated by the oscillator;
a phase comparator receiving a reference signal and the output signal generated by the oscillator, the phase comparator generating an oscillation frequency control voltage as a function of the difference between the reference signal and the output signal generated by the oscillator; and
a switch selectively placing the oscillator in an open loop or a closed loop; and
a control circuit for:
placing the oscillator in an open loop, applying the output signal generated by the oscillator to the send circuit and coupling the send circuit to the aerial during a send phase; and
placing the oscillator in a closed loop, applying the output signal generated by the oscillator to the receive circuit and coupling the receive circuit to the aerial during a receive phase.