| US 7,596,770 B1 | ||
| Temporal decomposition for design and verification | ||
| Andreas Kuehlmann, Berkeley, Calif. (US); and Xiaoqun Du, New Providence, N.J. (US) | ||
| Assigned to Cadence Design Systems, Inc., San Jose, Calif. (US) | ||
| Filed on Jun. 02, 2005, as Appl. No. 11/144,389. | ||
| Int. Cl. G06F 17/50 (2006.01) | ||
| U.S. Cl. 716—3 [716/4; 716/5] | 11 Claims |
| 1. A method of representation of behavior of a finite state machine comprising:
unfolding, using an unfolding process performed by a computer, a transition relation that represents combinational logic behavior
of the finite state machine into a sequence of transition relations representing combinational logic behavior of the finite
state machine in a sequence of time frames;
determining, using a determining process performed by a computer, in a transition relation in the sequence at least one state
that cannot be reached in a subsequent transition relation in the sequence; and
simplifying, using a simplifying process performed by a computer, the subsequent transition relation in the sequence in which
the at least one state that cannot be reached with respect to the at least one unreachable state.
|