| US 7,596,666 B2 | ||
| Multi-path accessible semiconductor memory device having port state signaling function | ||
| Hyo-Joo Ahn, Seoul (Korea, Republic of); and Chi-Sung Oh, Gyeonggi-do (Korea, Republic of) | ||
| Assigned to Samsung Electronics Co., Ltd., Suwon-si, Gyeonggi-do (Korea, Republic of) | ||
| Filed on Aug. 22, 2006, as Appl. No. 11/466,399. | ||
| Claims priority of application No. 10-2005-0127526 (KR), filed on Dec. 22, 2005. | ||
| Prior Publication US 2007/0150669 A1, Jun. 28, 2007 | ||
| Int. Cl. G06F 12/00 (2006.01) | ||
| U.S. Cl. 711—149 | 19 Claims |
| 1. A semiconductor memory device, comprising:
at least one shared memory area allocated in a memory cell array;
a plurality of ports corresponding to a plurality of processors, each port used by the corresponding processor to selectively
access the shared memory area; and
an occupancy state signaling unit to output port occupancy state information to the processor requesting access to the shared
memory area through the port corresponding to the processor requesting access to the shared memory area to indicate whether
access to the shared memory area is allowed;
wherein the occupancy state signaling unit comprises:
a plurality of decoding and generating units to decode external signals applied through the ports to generate active enable
signals from the decoded external signals;
a port output selecting unit to receive the active enable signals and output select control signals, wherein only one of the
select control signals is at a logic high level at any time; and
a plurality of occupancy state information outputting units to output respective port occupancy state information through
data output pads of each port in response to the select control signals.
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