US 7,596,648 B2
System and method for information handling system error recovery
Madhusudhan Ramgarajan, Round Rock, Tex. (US); and Vijay Nijhawan, Austin, Tex. (US)
Assigned to Dell Products L.P., Round Rock, Tex. (US)
Filed on Mar. 08, 2007, as Appl. No. 11/683,450.
Prior Publication US 2008/0222449 A1, Sep. 11, 2008
Int. Cl. G06F 13/24 (2006.01)
U.S. Cl. 710—263  [710/268; 714/5; 714/13] 19 Claims
OG exemplary drawing
 
1. An information handling system comprising:
a CPU operable to process information;
RAM interfaced with the CPU and operable to store information, the RAM having plural units;
an SMI handler running in association with a first unit of the RAM and operable to perform error handling associated with the RAM; and
an SMI handler location module associated with the SMI handler, the SMI handler location module operable to store plural copies of the SMI handler in plural RAM units, to monitor the first unit of RAM for errors, and to run the SMI handler in association with one of the plural copies if an error is detected at the first unit of the RAM.