| US 7,596,037 B2 | ||
| Independent bi-directional margin control per level and independently expandable reference cell levels for flash memory sensing | ||
| Vishal Sarin, Cupertino, Calif. (US); Hieu Van Tran, San Jose, Calif. (US); and William John Saiki, Mountain View, Calif. (US) | ||
| Assigned to Silicon Storage Technology, Inc., Sunnyvale, Calif. (US) | ||
| Filed on Sep. 14, 2007, as Appl. No. 11/855,801. | ||
| Prior Publication US 2009/0073770 A1, Mar. 19, 2009 | ||
| Int. Cl. G11C 5/14 (2006.01) | ||
| U.S. Cl. 365—189.09 [365/185.03; 365/185.2; 365/185.22; 365/189.02] | 12 Claims |
| 1. A reference voltage generator comprising:
an absolute read reference level generator providing a plurality of read voltage reference levels in response to a voltage
reference;
an absolute read reference level trim decoder providing a first selection signal indicative of an absolute read reference
level;
a first multiplexer coupled to the absolute read reference level generator to provide a selected read voltage reference level
in response to the first selection signal;
a relative margin level generator providing a plurality of positive margin signals, a plurality of negative margin signals,
and a margin reference in response to the voltage reference;
a second multiplexer for selecting ones of said positive margin signals and negative margin signals in response to a second
selection signal; and
a relative margin level trimmed decoder providing the second selection signal indicative of a relative margin level.
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