| US 7,596,022 B2 | ||
| Method for programming a multi-level non-volatile memory device | ||
| Dong-Hyuk Chae, Seoul (Korea, Republic of); and Dae-Seok Byeon, Yongin-si (Korea, Republic of) | ||
| Assigned to Samsung Electronics Co., Ltd., Suwon-Si (Korea, Republic of) | ||
| Filed on Aug. 30, 2007, as Appl. No. 11/848,014. | ||
| Claims priority of application No. 10-2006-0085880 (KR), filed on Sep. 06, 2006. | ||
| Prior Publication US 2008/0089123 A1, Apr. 17, 2008 | ||
| This patent is subject to a terminal disclaimer. | ||
| Int. Cl. G11C 16/04 (2006.01) | ||
| U.S. Cl. 365—185.03 [365/185.18] | 28 Claims |
| 1. A method for programming multi-level non-volatile memory comprising at least one flag cell and a plurality of multi-bit
storage cells, each of the plurality of multi-bit storage cells capable of storing different levels of charge usable to represent
data, the data represented by a least significant bits (LSBs) and a most significant bits (MSBs), the method comprising:
programming the storage cells first with LSBs and then with MSBs such that each of the programmed storage cells:
has a threshold voltage lower than a voltage VR1 when it is desired that the storage cell store a first value;
has a threshold voltage greater than the voltage VR1 and lower than a voltage VR2 when it is desired that the storage cell store a second value;
has a threshold voltage greater than the voltage VR2 and lower than a voltage VR3 when it is desired that the storage cell store a third value; and
has a threshold voltage greater than a voltage VR3 when it is desired that the storage cell store a fourth value;
wherein VR1<VR2<VR3; and
programming the flag cell to have a threshold voltage greater than the voltage VR3 to indicate that the MSBs have been programmed.
|