| US 7,595,530 B2 | ||
| Power semiconductor device with epitaxially-filled trenches | ||
| Kenichi Tokano, Kawasaki (Japan); Tetsuo Matsuda, Hyogo (Japan); and Wataru Saito, Kawasaki (Japan) | ||
| Assigned to Kabushiki Kaisha Toshiba, Tokyo (Japan) | ||
| Filed on Mar. 01, 2006, as Appl. No. 11/364,203. | ||
| Claims priority of application No. 2005-055369 (JP), filed on Mar. 01, 2005. | ||
| Prior Publication US 2006/0197152 A1, Sep. 07, 2006 | ||
| Int. Cl. H01L 29/38 (2006.01) | ||
| U.S. Cl. 257—335 [257/E29.262] | 8 Claims |
| 1. A semiconductor device, comprising:
a semiconductor substrate;
a plurality of first semiconductor regions of a first conduction type formed by disposing a single crystal semiconductor layer
of the first conduction type on a surface of the semiconductor substrate and providing a plurality of trenches in the single
crystal semiconductor layer, the plurality of first semiconductor regions being formed at intervals in a direction parallel
to the surface; and
a plurality of second semiconductor regions of a second conduction type formed of an epitaxial layer buried in the plurality
of trenches, the plurality of second semiconductor regions each including:
an outer portion formed against an inner wall of the trench inside the trench, and
an inner portion formed inside the outer portion,
wherein the outer portion has a higher impurity concentration than the inner portion.
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