| US 7,594,200 B2 | ||
| Method for finding multi-cycle clock gating | ||
| Cynthia Rae Eisner, Zichron Ya'akov (Israel); and Monica Farkash, Austin, Tex. (US) | ||
| Assigned to International Business Machines Corporation, Armonk, N.Y. (US) | ||
| Filed on Dec. 19, 2005, as Appl. No. 11/311,756. | ||
| Prior Publication US 2007/0157130 A1, Jul. 05, 2007 | ||
| Int. Cl. G06F 17/50 (2006.01) | ||
| U.S. Cl. 716—2 [716/18] | 4 Claims |
| 1. A method comprising:
generating multi-cycle gating groups of data latching devices, on a processor, where each said gating group is associated
with a single gating function and also comprising for each gating group, gating first cycle data latching devices of said
gating group with said gating function and gating data latching devices of said gating group for subsequent cycles with a
latched version of said gating function latched according to its cycle.
|