| US 7,593,456 B2 | ||
| Maximum likelihood block decision feedback estimation for CCK demodulation apparatus and method | ||
| Sankabathula Dharani Naga Sailaja, Vijayawada (India); Parthasarathy Murali, Hyderabad (India); and Narasimhan Venkatesh, Hyderabad (India) | ||
| Assigned to Red Pine Signals, Inc., San Jose, Calif. (US) | ||
| Filed on Jun. 06, 2008, as Appl. No. 12/134,851. | ||
| Application 12/134851 is a continuation of application No. 10/934275, filed on Sep. 03, 2004, granted, now 7,412,000. | ||
| Prior Publication US 2008/0273586 A1, Nov. 06, 2008 | ||
| Int. Cl. H04B 1/00 (2006.01); H03H 7/30 (2006.01); H03H 7/40 (2006.01) | ||
| U.S. Cl. 375—150 [375/233] | 8 Claims |
| 1. A process for converting a symbol of length nsymbol to a communication channel compensated decision feedback value, said process using a serial shift register, formed from a
plurality flt_len of registers, each said register generating one of the output phases φ={1,j,−1,−j} from its output value,
said process comprising:
a first step of loading a complete symbol value {c1,c2, . . . , cnsymbol} into the first nsymbol values of said shift register;
a second step of shifting the values of said shift register Nlength times, and for each shift operation, forming an output
value by summing the product of each said channel_coefficient {C1,C2, . . . , Cflt_len} multiplied by a respective shift register output phase {φ1,φ2,φ3, . . . , φflt_len}, where said channel coefficients {C1,C2, . . . , Cflt_len} are derived from the characteristic of said communications channel which received said symbol;
a third step of providing said shifted output to a pre-equalization register where said pre-equalization register adds said
shifted output to a subsequently received CCK symbol;
where said flt_len is greater than said nsymbol.
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